Synplicity Automates Physical Synthesis for PLD Designers
Amplify Software Supports High-Density PLDs and Platform-Based Solutions From Altera and Xilinx
SUNNYVALE, Calif.--(BUSINESS WIRE)--April 8, 2002--Synplicity,
Inc. (Nasdaq: SYNP - news), a leading supplier of software for the design and
verification of semiconductors, today announced it has enhanced its
Amplify® Physical Optimizer(TM) software, the industry's only
physical synthesis solution for PLD designers. With today's
announcement, Synplicity has fully automated the Amplify physical
synthesis flow, which can dramatically improve designer productivity
and deliver performance improvements by up to 20 percent over logic
synthesis alone. The automated flow initially supports the Xilinx®
Virtex®, Virtex-E and Virtex-II(TM) devices, and Synplicity intends
to support the Altera Stratix device family in a future release of the
software. The enhanced Amplify software also offers support for
Altera's APEX devices and Excalibur embedded processor solutions as
well as the new Virtex-II Pro(TM) devices from Xilinx.
"As the capabilities of programmable logic devices grow to include
complex I/Os and embedded processors, an integrated design flow that
takes physical effects into account early in the cycle is critical to
design success," said Andy Haines, vice president of marketing at
Synplicity. "Over the past two years, we believe the Amplify software
has improved performance for customer designs by an average of more
than 20 percent. By automating the physical synthesis flow, we expect
many more designers will now be able to take advantage of the Amplify
product to quickly meet timing goals and save money through the use of
lower speed grade components."
Enhancements to Industry's Only PLD Physical Synthesis Solution
Using the automated flow to perform simultaneous placement and
optimization, Synplicity believes designers can obtain a performance
boost of up to 20 percent over traditional synthesis. The automated
flow uses actual placement and routing delay information obtained
during an initial place and route run to perform additional logic
optimizations and incremental placement, reducing iterations between
synthesis and place and route. The automated design flow initially
supports designers using the Virtex, Virtex-E and Virtex-II devices
from Xilinx.
If additional performance improvement is needed, designers may
then employ the Amplify software's interactive design flow to boost
performance further. The interactive flow has also been enhanced to
include new detailed placement technology and additional physical
optimizations, providing designers with more accurate timing
estimations, further reducing design iterations. Together, the Amplify
software's automatic and interactive design flows can deliver
performance improvements up to 45 percent higher than logic synthesis
alone.
"Synplicity's Amplify software has consistently provided our
customers with a synthesis solution that enables them to reach
aggressive performance goals," said Rich Sevcik, senior vice president
of FPGA products at Xilinx, Inc. "Now with an automated flow,
developed first for Xilinx, designers can achieve and surpass these
milestones even faster, taking full advantage of the time to market
benefits offered by our FPGA products. We continue to recommend
Synplicity's Amplify software to our customers who need to obtain the
highest possible performance for their designs."
The new version of the Amplify software features additional
enhancements to its interactive flow, including logic-array-block
(LAB)-level support for Altera's APEX devices, which provides
designers with the ability to constrain logic to individual LABs. This
support offers designers more control of logic placement and more
importantly, a new set of physical optimizations to boost performance.
Synplicity's physical synthesis solution has also been optimized with
custom mappers to support Altera's Excalibur embedded processor
solutions for system-on-a-programmable-chip (SOPC) designs.
Tim Southgate, vice president of software and tools marketing at
Altera Corporation, said, "Synplicity continues to be an important
partner for Altera and our customers. We have worked closely with
Synplicity to ensure our software tools deliver a high level of
performance and productivity for customers designing advanced
programmable logic devices, such as our new Stratix device family.
Additionally, we believe the new enhancements in the Amplify product
for our APEX devices and industry-leading Excalibur embedded processor
solutions will allow designers to quickly maximize the performance of
these complex architectures."
Driven by the proprietary Behavior Extracting Synthesis
Technology® (B.E.S.T.(TM)) algorithms, Synplicity's Amplify Physical
Optimizer software can synthesize even the largest programmable
devices quickly and efficiently. The software also utilizes
Synplicity's Total Optimization Physical Synthesis(TM) (TOPS(TM))
technology to perform simultaneous placement and logic optimization
enabling designers to achieve maximum performance from their
high-density programmable logic devices (PLDs).
Pricing and Availability
The automated Amplify Physical Optimizer software with TOPS
technology is available now as an option to Synplicity's Synplify
Pro® logic synthesis software. Pricing begins at $25,000 (U.S.).
Current customers on maintenance will be upgraded at no additional
cost. The Amplify solution is now also available for Windows XP and
Linux (RedHat 7.2) operating systems.
About Synplicity
Synplicity, Inc. (Nasdaq: SYNP - news) is a leading provider of software
products that enable the rapid and effective design and verification
of semiconductors used in networking and communications, computer and
peripheral, consumer and military/aerospace electronics systems.
Recognizing the company's industry-leading position, Dataquest named
Synplicity as the No. 1 provider of PLD synthesis tools in 2000 with a
45 percent market share. Synplicity leverages its innovative logic
synthesis, physical synthesis and verification software solutions to
improve performance and shorten development time for complex
programmable logic devices, application specific integrated circuits
(ASICs) and system-on-chip (SoC) integrated circuits. The company's
fast, easy-to-use products offer high quality of results, support
industry-standard design languages (VHDL and Verilog) and run on
popular platforms. As of December 31, 2001, Synplicity employed 266
people in its 20 facilities worldwide. Synplicity is headquartered in
Sunnyvale, Calif. For more information on Synplicity, visit
http://www.synplicity.com.
The specific features, functionality and release timing of any new
versions of current products as described in this press release remain
at the sole discretion of Synplicity, Inc., and Synplicity does not
make any warranty as to when or if such specific features,
functionality or releases may occur.
Note to Editors: Synplicity, Amplify, Behavior Extracting
Synthesis Technology, and Synplify Pro are registered trademarks of
Synplicity, Inc. B.E.S.T., Physical Optimizer, Total Optimization
Physical Synthesis and TOPS are trademarks of Synplicity, Inc. All
other brands or products are the trademarks or registered trademarks
of their respective owners.
Contact:
Synplicity, Inc.
Jeff Garrison, 408/215-6000
jeff@synplicity.com
or
Porter Novelli
Steve Gabriel, 408/369-1500
steve.gabriel@porternovelli.com
